/*************************************************
* CHIPSEA F61 FRAMEWORK
* Copyright(c) 2018, NewDegreeTechnology, Inc.
**************************************************/

//#include "hal_ndt_common.h"

//#ifdef CS_F61

#ifndef HAL_CS_F61_FRAMEWORK_H
#define HAL_CS_F61_FRAMEWORK_H

///////////////////////////////////////////////////////////////////////////////////////////////////

/* Defien CHIPSEA F61 Parameter */

/* The parameter of DATA TABLE */
#define MD_COUNT			8
#define GA_COUNT			2
#define RST_SRC_COUNT       4
///////////////////////////////////////////////////////////////////////////////

/* The parameter of CPU */
#define CPU_PLL_BP                      0
#define CPU_PLL_OE                      0
#define CPU_PLL_SRC                     1
#define CPU_PLL_INDV                    PLL_INDIV_6
#define CPU_PLL_OUTDV                   PLL_OUTDIV_4
#define CPU_PLL_FBDV                    PLL_FBDIV_36

///////////////////////////////////////////////////////////////////////////////

/* The parameter of UART */
#define UART_BAUDRATE                   BaudRate_115200
#define UART_PARITY                     UART_Parity_No;
#define UART_WORDLENGTH                 UART_WordLength_8bit;
#define UART_STOPBITS                   UART_StopBit_1;

#define UART_FIFO_ENABLE                ENABLE;
#define UART_FIFO_RCVR                  FIFO_OneData;
#define UART_RIE_ENABLE                 DISABLE;

///////////////////////////////////////////////////////////////////////////////

/* The parameter of TIMER */
#define TIMER0_INTEN                    ENABLE
#define TIMER0_COUNTMODE                Timer_CountMode_Peroid
#define TIMER0_PRESCALE                 9
#define TIMER0_TCMP                     10

#define TIMER1_TCMP			4000

///////////////////////////////////////////////////////////////////////////////

/* The parameter of DELAY */
#define DELAY_SYSTICK_IEENABLE          DISABLE
#define DELAY_SYSTICK_RELOAD            10      //1ms

///////////////////////////////////////////////////////////////////////////////

/* The parameter of WDT */
#define WDT_PERIODTIME                  WDT_PeriodTime_2q16     //16384 * 0.1 ms ???1.6s
#define WDT_INT_ENABLE                  ENABLE
#define WDT_RESYSTEM_ENABLE             ENABLE                  //wdt 超时复位
//#define WDT_INT_WAKEUP_ENABLE         DISABLE                 //wdt 中断唤醒
#define WDT_DELAY_TIME                  WDT_DelayTime_130CLK
#define WDT_ENABLE                      ENABLE

#define VS_PA0 (PD_SWIN_A0_EN | PD_SWIN_A1_DIS |PD_SWIN_A2_DIS | PD_SWIN_A3_DIS)
#define VS_PA1 (PD_SWIN_A0_DIS | PD_SWIN_A1_EN |PD_SWIN_A2_DIS | PD_SWIN_A3_DIS)
#define VS_PA2 (PD_SWIN_A0_DIS | PD_SWIN_A1_DIS |PD_SWIN_A2_EN | PD_SWIN_A3_DIS)
#define VS_PA3 (PD_SWIN_A0_DIS | PD_SWIN_A1_DIS |PD_SWIN_A2_DIS | PD_SWIN_A3_EN)

/* IIC macro definition */
#define I2C0_SLAVE_ADDRESS		((AW_U8)0x5C) //IIC Slave address

#define I2C_CLK		(500000)
#define I2C_SPKLEN	(1)
#define I2C_HCNT	(SYS_CLOCK / (3 * I2C_CLK) - 6 -I2C_SPKLEN)
#define I2C_LCNT	(2 * SYS_CLOCK / (3 * I2C_CLK) - 1)

#define FS_SPKLEN_NUM			I2C_SPKLEN
#define I2C_FS_SCL_HCNT			((AW_U16)I2C_HCNT)
#define I2C_FS_SCL_LCNT			((AW_U16)I2C_LCNT)

#define I2C_SDA_HOLD			((AW_U8)0x05)
#define I2C_SDA_SETUP			((AW_U8)0x64)
#define I2C_FIFO_TX_TL_NUM		(0U)
#define I2C_FIFO_RX_TL_NUM		(0U)

/* TIMER macro definition */
#define TIMER_5			((AW_U32)120000) // 5ms
#define TIMER_10		((AW_U32)240000) // 10ms
#define TIMER_20			((AW_U32)480000) // 10ms

/* UART macro definition */
#define BAUD_RATE ((AW_U32)9600)

/* WDT macro definition */
#define WDT_TOOR_DATA		(4U)

/* SWDT macro definition */
/* SWdt_delay = num * 16 * 25us    LOSC = 40K*/
/* SWdt_delay = num * 400us */
/* SWdt_delay = num * 16 * 33us    LOSC = 30K*/
/* SWdt_delay = num * 528us */
#define SWDT_LOAD_MAX		((AW_U32)0xfff)
#define SWDT_LOAD_NUM		((AW_U32)0x04)

#define SWDT_LOAD_5MS		((AW_U32)0x0B)
#define SWDT_LOAD_10MS  ((AW_U32)0x16)
#define SWDT_LOAD_40MS  ((AW_U32)0x57)
#define SWDT_LOAD_100MS  ((AW_U32)0xD9)
#define SWDT_LOAD_1000MS ((AW_U32)0x893)
#define SWDT_LOAD_2S  ((AW_U32)0xFFF)
/* NVR buff len macro definition */
#define NVR_BUFF_LEN	(36U)
#define NVR_FLASH_STAR	(0x69)
#define NVR_ROM_STAR	(0x00)
#define LOSC_35K_TRIM	(0x1C) // 35K
#define LOSC_10K_TRIM	(0x10) // 10K
#define NVR_LDO_TRIM	(0xAF)
#define NVR_ADR_1		(0x02000000)
#define NVR_ADR_2		(0x02000200)
#define NVR_ADR_TMP		(0x0200000C)
#define NVR_TMP_FLG_LEN		(3)
#define NVR_TMP_BYTE_LEN	(12)
#define TMP_IC_FLG		(0x5A5A55AA)

#ifndef AW_MCU_IRQ
#define AW_MCU_IRQ	(0)
#endif

#define ADC_OPEN_VS0 (~(1 << 8))
#define ADC_OPEN_VS1 (~(1 << 9))
#define ADC_OPEN_VS2 (~(1 << 10))
#define ADC_OPEN_VS3 (~(1 << 11))

#define ADC_CLOSE_VS0 (1 << 8)
#define ADC_CLOSE_VS1 (1 << 9)
#define ADC_CLOSE_VS2 (1 << 10)
#define ADC_CLOSE_VS3 (1 << 11)

#define ADC_OPEN_VS ADC_OPEN_VS1
#define ADC_CLOSE_VS ADC_CLOSE_VS1

// #ifndef BUILD_SW_ONLY
// #define MCU_TM0_REG_VAL (TIMER0->TCMPR0)
// #else
#define MCU_TM0_REG_VAL (st_sys_ctr.period)
// #endif

#ifndef DP_IIC_WAKE_UP
#define DP_IIC_WAKE_UP 1
#endif

#ifndef BUILD_SW_ONLY

///////////////////////////////////////////////////////////////////////////////////////////////////
#include "aw8680x.h"
#include "aw_type.h"
#include "aw8680x_afe.h"
#include "aw8680x_conf.h"
#include "aw8680x_crc.h"
#include "aw8680x_def.h"
#include "aw8680x_flash.h"
#include "aw8680x_global.h"
#include "aw8680x_gpio.h"
#include "aw8680x_hdiv.h"
#include "aw8680x_i2c.h"
#include "aw8680x_i2c_software.h"
#include "aw8680x_pwr.h"
#include "aw8680x_sys.h"
#include "aw8680x_timer.h"
#include "aw8680x_uart.h"
#include "aw8680x_wdt.h"

///////////////////////////////////////////////////////////////////////////////

/* CHIPSEA F61 HAL */
#include "hal_aw_86802_timer.h"
#include "hal_aw_86802_uart.h"
#include "hal_aw_86802_gpio.h"
#include "hal_aw_86802_delay.h"
#include "hal_aw_86802_wdt.h"
#include "hal_aw_86802_flash.h"
#include "hal_aw_86802_tempsensor.h"
#include "hal_aw_86802_afe.h"
#include "hal_aw_86802_sleep.h"
#include "hal_aw_86802_iic.h"
#include "hal_aw_86802_power.h"
#include "hal_aw_86802_reg.h"
#include "hal_aw_86802_flash_rw.h"

///////////////////////////////////////////////////////////////////////////////////////////////////

#endif

#endif  /* HAL_CS_F61_FRAMEWORK_H */

//#endif /* End of CS_F61 */

